1. Field of the Invention
The present invention relates to a variable delay buffer circuit and more particularly, to a variable delay buffer circuit used for digital Integrated Circuits (Ics).
2. Description of the Prior Art
FIG. 1 shows an example of conventional variable delay buffer circuits of this sort. As the variable delay buffer circuit is generally composed of a cascade of k variable delay buffers, where k is an integer, only one of the delay buffers cascaded is shown in FIG. 1 for the sake of simplification of description.
In FIG. 1, a selector circuit 34 receives an input digital signal 301 inputted through a data input terminal 31 and a delayed input digital signal 302 produced in a delay circuit 32 by delaying in time the input digital signal 301 to select one of the signals 301 and 302. The signal thus selected in the selector circuit 34 is outputted through a data output terminal 35 as an output digital signal 311.
The selector circuit 34 also receives through an input terminal 33 a delay control signal 310 for controlling a delay time of the input digital signal 301, and selects one of the signals 301 and 302 in response to the control signal 310.
The conventional variable delay buffer circuit is composed of a plurality of the delay circuits shown in FIG. 1 cascaded by necessary stages, and the delay time of an output signal of the delay buffer circuit is set by changing the delay control signals inputted to the respective input terminals of the selector circuits.
With the conventional variable delay buffer circuit, the selection of the digital signals 301 and 302 and the change in state or level of the delay control signal 310 are carried out simultaneously in the selector circuit 34 shown in FIG. 1. Therefore, in the case that the changing time of the input digital signal 301 or the delayed digital signal 302 accords with the changing time of the control signal 310, the "glitch" due to distortion in a pulse waveform tends to occur in the output signal 311 because of the selection action in the selector circuit 34.
Thus, there is a problem that any digital circuit such as a flip-flop circuit tends to malfunction when the output digital signal 311 containing the glitch is used as a clock signal for the digital circuit.